Prof. Jong-Ho Lee, IEEE Fellow
Seoul National University, Korea
Biography: Prof. Lee received the B.S. degree from Kyungpook National University, Daegu, Korea, in 1987 and the M.S. and Ph.D. degrees from Seoul National University, Seoul, in 1989 and 1993, respectively, all in electronic engineering.
In 1993, he worked on advanced BiCMOS process development at ISRC, Seoul National University as an Engineer. In 1994, he was with the School of Electrical Engineering, Wonkwang University, Iksan, Chonpuk, Korea. In 2002, he moved to Kyungpook National University, Daegu Korea, as a Professor of the School of Electrical Engineering and Computer Science. Since September 2009, he has been a Professor in the School of Electrical and Computer Engineering, Seoul National University, Seoul Korea. From 1994 to 1998, he was with ETRI as an invited member of technical staff, where he worked on deep submicron MOS devices, device isolation. From August 1998 to July 1999, he was with Massachusetts Institute of Technology, Cambridge, as a postdoctoral fellow, where he was engaged in the research on sub-100 nm double-gate CMOS devices.
Prof. Lee is a Lifetime Member of the Institute of Electronics Engineers of Korea (IEEK) and IEEE Fellow. He has been served as a subcommittee member of IEDM, ITRS ERD member, a general chair of IPFA2011, and IEEE EDS Korea chapter chair. He received many awards for excellent research papers and research excellence. He invented bulk FinFET, Saddle FinFET (or bCAT) for DRAM cell transistors, and NAND flash cell string with virtual source/drain. These three inventions are key technologies which have been applying for mass production in industry.
Prof. Xiaoqing Wen, IEEE Fellow
Kyushu Institute of Technology, Japan
Biography: Xiaoqing WEN received the B.E. degree from Tsinghua University, China, in 1986, the M.E. degree from Hiroshima University, Japan, in 1990, and the Ph.D. degree from Osaka University, Japan, in 1993. He was an Assistant Professor with Akita University, Japan, frrom 1993 to 1997, and a Visiting Researcher with the University of Wisconsin–Madison, USA, from Oct. 1995 to Mar. 1996. He joined SynTest Technologies Inc., USA, in 1998, and served as its Vice President and Chief Technology Officer until 2003. He joined Kyushu Institute of Technology, Japan, in 2003, where he is currently a Professor of the Department of Creative Informatics. He founded Dependable Integarted Systems Research Center at Kyushu Institute of Technology in 2013 and served as its Director until 2015. He is a Co-Founder and Co-Chair of Technical Activity Committee on Power-Aware Testing under Test Technology Technical Council (TTTC) of IEEE Computer Society. He is an Associate Editor for IEEE Transactions on Very Large Scale Integration Systems (TVLSI) and Journal of Electronic Testing: Theory and Applications (JETTA). He co-authored and co-edited two popular books, VLSI Test Principles and Architectures: Design for Testability (2006) and Power-Aware Testing and Test Strategies for Low Power Devices (2009). His research interests include design, test, and diagnosis of VLSI circuits. He holds 43 U.S. Patents and 14 Japan Patents. He received the 2008 Society Best Paper Award from the Infromation Systmes Society (ISS) of Institute of Electronics, Information and Communication Engineers (IEICE). He is a Fellow of IEEE, a Councillor of Japan Micro-Nano Bubble Society Corporation (MNBSC), a Senior Member of Information Processing Society of Japan (IPSJ), and a member IEICE.